The Panmnesia Compute Express Link (CXL) IP implements all necessary logic for CXL device, host, and switch. The IP supports all features of the CXL 3.1 specifications and is fully backward compatible with CXL 3.0, 2.0, 1.1, and 1.0 specifications. Panmnesia’s CXL IP consists of Panmnesia CXL Controller IP and Panmnesia Custom CXL Logic. The Panmnesia CXL Controller IP supports all operations which are required to communicate based on CXL specification, by sustaining all CXL subprotocols, including CXL.cache, CXL.mem, and CXL.io. On top of this foundational layer, Panmnesia Custom CXL Logic enables various system devices to manage and access memory space based on the CXL specification.