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  3. CXL Topology-Aware and Expander-Driven Prefetching: Unlocking SSD Performance

CXL Topology-Aware and Expander-Driven Prefetching: Unlocking SSD Performance

CXL Topology-Aware and Expander-Driven Prefetching: Unlocking SSD Performance

Dongsuk Oh, Miryeong Kwon, Jiseon Kim, Eunjee Na, Junseok Moon, Hyunkyu Choi, Seonghyeon Jang, Hanjin Choi, Hongjoo Jung, Sangwon Lee, Myoungsoo Jung

IEEE Micro

2025

Research Areas
Coherent Interconnect
Machine Learning
Architecture
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Abstract

Integrating compute express link (CXL) with SSDs allows scalable access to large memory but has slower speeds than DRAMs. We present ExPAND, an expander-driven CXL prefetcher that offloads last-level cache (LLC) prefetching from host CPU to CXL-SSDs. ExPAND uses a heterogeneous prediction algorithm for prefetching and ensures data consistency with this http URL's back-invalidation. We examine prefetch timeliness for accurate latency estimation. ExPAND, being aware of CXL multi-tiered switching, provides end-to-end latency for each CXL-SSD and precise prefetch timeliness estimations. Our method reduces CXL-SSD reliance and enables direct host cache access for most data. ExPAND enhances graph application performance and SPEC CPU's performance by 9.0 and 14.7, respectively, surpassing CXL-SSD pools with diverse prefetching strategies.


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