Panmnesia to Offer CXL 3.1 Switch Chips Next Year - Unveils Product Roadmap

In the middle of this month, Panmnesia CEO Myoungsoo Jung revealed the development status and roadmap for their core CXL product line. Panmnesia plans to produce the CXL 3.1 switch SoC chip and provide it to customers by the second half of next year. It will incorporate Panmnesia’s groundbreaking IP, boasting the world’s first sub-two digit nanosecond latency for CXL designs. Emerging Memory Expansion Solution in the AI Era: Compute eXpress Link (CXL) In recent years, the widespread adoption of large-scale machine learning services like ChatGPT has significantly impacted daily life. As companies behind these advanced services push for higher performance by expanding model sizes and data volumes, the demand for memory capacity in data centers has surged. In this context, major tech companies are increasingly focusing on Compute eXpress Link (CXL), an interconnect technology that offers cost-effective memory expansion with both economic and performance benefits. CXL enables the integration of computing and memory resources in any desired proportion, creating a unified memory space that facilitates efficient memory expansion. Additionally, CXL controllers handle operations such as cache coherence management through hardware acceleration, making it a performance-optimized choice. Panmnesia has emerged as one of leading companies in the CXL technology landscape, first garnered attention at the 2022 USENIX Annual Technical Conference by unveiling the world’s first complete CXL 2.0 system, including CXL switches. In the following year, Panmnesia advanced this system to support the CXL 3.0 and CXL 3.1 standards, showcasing these advancements at international exhibitions. Earlier this year, Panmnesia introduced a CXL-enabled AI accelerator, earning the CES 2024 Innovation Award. Recently, the company has attracted significant media and industry attention by unveiling a CXL-GPU solution that expands GPU system memory using CXL. Panmnesia Unveils CXL Product Roadmap Featuring CXL Switch SoC and CXL IP In the middle of this month, Myoungsoo Jung, CEO of Panmnesia, delivered a speech detailing the development status and future roadmap for Panmnesia’s core CXL product lines including the CXL switch SoC (System-on-Chip) and CXL IP. During his presentation, Jung announced plans to provide the CXL 3.1 switch chip to customers by the second half of next year. The CXL switch is a pivotal device that connects various system components such as CPUs, memories, and accelerators, managing end-to-end communication between them. This product is currently under intensive development, leveraging Panmnesia’s proprietary IP. Panmnesia’s CXL switch supports all features defined in the latest CXL 3.1 standard and is fully interoperable with devices adhering to previous standards. It offers high scalability by allowing multiple switches to be connected in multiple levels or configured in a fabric-like structure, enabling the connection of hundreds of devices across multiple servers. Adiitionally, since Panmnesia’s IP covers all subprotocols of CXL, including CXL.mem, CXL.cache, and CXL.io, their switch is highly versatile, capable of connecting various types of devices such as memory, AI accelerators, and GPUs. Thanks to its high scalability and versatility, Panmnesia’s CXL switch is ideal for connecting a wide variety of devices in large-scale servers, such as those used in cloud environments. In the latter part of the presentation, CEO Jung unveiled the actual silicon of the CXL 3.1 controller chip, which completed the silicon manufacturing process earlier this year. Holding up the chip, Jung explained, “This silicon chip incorporates Panmnesia’s high-performance CXL 3.1 IP.” Notably, Panmnesia’s CXL 3.1 IP achieved the world’s first sub-two digit nanosecond latency. This IP will also be integrated into the CXL switch chip developed by Panmnesia. CEO Jung expressed confidence in the product, stating, “Our CXL 3.1 switch will not only reduce server operating costs but also enable practical memory expansion in terms of performance, thanks to our high-performance CXL IP.” For more detailed information about Panmnesia’s CXL solutions, visit their official website or the Design & Reuse platform, which mediates the sale of semiconductor IP. Design & Reuse

CXL-GPU: Panmnesia Breaks The Limitation of GPU Memory Capacity with World's First Two-Digit nanosecond Latency CXL Controller

Panmnesia revealed world’s first two-digit nanosecond latency CXL Controller, featuring its own CXL ASIC IP. The latency is shorter than any other reported values. Panmnesia’s CXL IP could be applied to various system devices to realize cost-efficient memory expansion with high performance. As a usage example of the CXL IP, Panmnesia introduced a storage expansion solution named ‘CXLGPU’, that can supply terabytes of memory to the GPU. Panmnesia will unveil this technology at USENIX federated conferences and ACM HotStorage, held in Santa Clara in July. CXL: Key for the Cost-Efficient Memory Expansion The memory requirement in data centers increases as large-scale applications such as large language models (LLM) become more common in our lives. To expand memory capacity costefficiently while maintaining reasonable performance, many big tech companies are focusing on an interconnect technology called Compute Express Link (CXL). With CXL, it is possible to construct a scalable, integrated memory space by connecting multiple system devices. Since memory resources or computational resources can be added independently based on demand, CXL enables memory expansion with minimized TCO (total cost of ownership). Furthermore, users do not need to manually manage the integrated memory space, as the CXL controller handles a set of memory management operations (e.g., cache coherence management) in a hardware-automated manner. Panmnesia’s CXL Controller with Two-Digit Nanosecond Latency: Key Component for a Truly Efficient CXL System Although CXL appears to be a promising solution for efficient memory expansion, one challenge remains to meet customers' expectations: latency. Customers expect memory expansion without a significant performance drop compared to local memory access, making it crucial to minimize the additional latency caused by memory expansion. Recently, Panmnesia developed a memory expansion technology that meets the customer’s demand for low latency. Panmnesia has developed and completed the silicon manufacturing process of their CXL Controller IP, which executes all of CXL’s communication operations with low latency. A CXL Controller featuring Panmnesia’s CXL IP exhibits the two-digit nanosecond round-trip latency, which is shorter than any other reported values. A representative at Panmnesia stated that “It was able to achieve such low latency by fully optimizing the controller's operations across all relevant layers, including the physical layer, link layer, and transaction layer.” The CXL controller IP developed by Panmnesia can be applied to a wide range of system devices, such as CPUs, switches, accelerators, and memory expanders, to automate and accelerate a set of memory management operations. By doing this, customers will be able to realize their ideal memory expansion, which reduces TCO with minimal performance degradation. CXL-GPU: Application of Panmnesia’s High-Speed CXL Controller IP While latency optimization is a common requirement across various industries, it is particularly important for companies providing AI services, such as LLM and recommendation systems. This is because latency directly impacts user satisfaction and revenue generation of AI services. As an example usage of the low-latency CXL Controller IP, Panmnesia introduces ‘CXL-GPU,’ a GPU storage expansion solution that can increase the memory capacity of the GPU while optimizing the latency of AI service. This solution constructs a terabyte-scale memory space by connecting multiple storage devices via CXL and integrates it into the GPU memory space. Data and model parameters for large-scale AI services can be stored in this integrated memory space, allowing the GPU to access and process this data for AI services. Panmnesia’s low-latency CXL controllers handle memory management operations while being deployed in both GPU and storage devices. Unlike the traditional method of purchasing multiple high-end GPUs to secure memory capacity, Panmnesia’s CXL-based storage expansion solution minimizes the server construction costs for AIservices since it enables the selective addition of memory resources based on demands. Furthermore, Panmnesia’s low-latency CXL controller minimizes the overhead caused by memory expansion, thereby maintaining reasonable performance. Panmnesia has built the hardware prototype of CXL-GPU by integrating their CXL Controller IP with custom GPU, which has been developed based on an open-source framework. Evaluation results on this prototype show that Panmnesia’s CXL-GPU solution outperforms traditional GPU memory expansion solution by 3.23 times. “The GPU storage expansion solution based on our CXL controller IP would help AI-service providers to significantly reduce their server construction cost,” said Dr. Myoungsoo Jung, CEO of Panmnesia. “While we introduced the solution to expand GPU memory capacity, our low-latency CXL controller IP is also a key component for efficient memory expansion in cloud computing and HPC.” CXL-GPU, Panmnesia’s GPU storage expansion solution using their CXL controller IP, will be unveiled at USENIX federated conferences and ACM HotStorage, held in Santa Clara in July. For more information on Panmnesia and its technologies, please refer to the following links. Tom's Hardware [link] MSN [link] Yahoo Tech [link] Digitaltrends [link] Storage Newsletter [link] Medium [link] Embedded [link] WCCFTECH [link] ThinkComputers [link] OC3D [link] TechPowerUp [link] DiskManufacturer [link] Gigazine [link] WhatPSU [link] Aroged [link] TweakTown [link] Techspot [link] Blocks & Files [link] Read The Technical Report Download The PDF Information about CXL 3.1 Controller IP (Design and Reuse)

Panmnesia Demonstrated Interoperability of its CXL IP at The Inaugural CXL DevCon Exhibition

Panmnesia participated as the main sponsor at the inaugural CXL Consortium Developer Conference 2024 (CXL DevCon 2024), held from April 30th to May 1st in Santa Clara, California, USA. Panmnesia showcased the interoperability of its Compute Express Link (CXL) IP at the event. On the second day, Panmnesia's Chief Strategy Officer (CSO), Miryeong Kwon, presented state-of-the-art CXL switch-based solutions for next-generation data centers. CXL: Promising Solution for The Next-Generation Datacenters Big tech companies have recently been racing to build large AI models. The demand for AI accelerators and memory expansion devices continues to surge with the evolution of larger and more complex AI models. To address this need, the industry is turning to CXL technology. CXL is a next-generation interface technology connecting various system devices while automating a set of behaviors required for memory management (cache coherency management). This technology optimizes the performance and efficiency of the data center by enabling flexible scaling of memory according to the resource requirements. This flexibility offers high performance and competitive prices, catching the eye of global tech giants like Microsoft and Meta. This CXL technology continues to evolve practically with each iteration of the specification. Since the proposal of CXL 1.0 in 2019, CXL 2.0 specification, utilizing CXL switches to improve scalability, was introduced in the following year. CXL 3.0/3.1 specifications were announced in 2022 and 2023, supporting memory sharing among multiple users to maximize memory resource utilization. Currently, various global companies are focusing on establishment of the CXL ecosystem, which requires verifying interoperability between different system device manufacturers to ensure compliance with CXL specifications. CXL DevCon 2024: The Inaugural Exhibition Officially Hosted by CXL Consortium The first-ever CXL DevCon 2024 is a event for global CXL consortium member companies that develops new products utilizing CXL technology. CXL DevCon 2024 featured exciting CXL technology demonstrations, presentations covering numerous important CXL topics, and opportunities to network with industry peers. In this inaugural exhibition, representative companies in CXL industry including Panmnesia, Samsung, SK Hynix, and Teledyne LeCroy participated as main sponsor. As one of the companies leading the CXL industry, Panmnesia showcased its innovative technology, and presented CXL use case scenario at CXL DevCon 2024. Panmnesia Exhibits: CXL Interoperability Test Demo and CXL All-in-One Framework At CXL DevCon 2024, Panmnesia demonstrated the interoperability of its CXL IP. Specifically, the demo showed that the CXL-enabled device implemented with Panmnesia’s CXL IP interacts with CXL-enabled CPUs from major CPU vendors, all in strict accordance with the CXL protocol. The validation of interoperability was conducted using the CXL test platform provided by a global test solution provider. An official from Panmnesia stated that they are planning to attend an official CXL compliance test event in the near future, to prove the functionality of its CXL IP product which not only supports all features of the latest version of the CXL specification but also maintains backward compatibility with previous versions. In addition to the interoperability test demonstration, Panmnesia also exhibited its CXL all-in-one framework. The CXL all-in-one framework consists of CXL CPUs, switches, memory expansion devices, and software based on Panmnesia’s CXL IPs. This framework features a full array of both hardware and software components meticulously designed for robust development processes. Panmnesia explained that the CXL all-in-one framework supports all vital features of CXL 3.1, such as multi-level switches and memory sharing capabilities, enabling the delivery of multiple terabytes of memory, and maximizing memory utilization. Panmnesia CSO’s Presentation at CXL DevCon: Next-Generation CXL Switch-Based Solutions On the second day of CXL DevCon, Miryeong Kwon, Panmnesia’s Chief Strategy Officer (CSO), presented Panmnesia's next-generation CXL switch-based solution. The CXL switch is a pivotal component of the CXL system, as it enables flexible connection of system devices according to user specifications. Panmnesia has meticulously designed its CXL switch to incorporate sophisticated software known as the fabric manager to enable configurable connectivity. This versatile feature allows users to scale their CXL system effortlessly. "Panmnesia's CXL switch technology will be crucial for optimizing the efficiency of big data services such as generative AI," said Miryeong Kwon. "Following CXL DevCon 2024, Panmnesia will participate in the Open Compute Project (OCP) meeting at Meta's Sunnyvale campus to unveil our CXL switch solutions. The event will be attended by executives and engineers from global IT companies, such as Intel, AMD, Micron, HPE, Marvell, Samsung, and SK Hynix. We look forward to showcasing our innovative technology and vision at the meeting.", she added. You can find more detailed information about CXL DevCon exhibition at the link below. CXL DevCon 2024

CXL Tech Day 2024 by Panmnesia

Panmnesia successfully hosted ‘CXL Tech Day 2024’ on January 19th in Daejeon, South Korea, drawing an audience of around a hundred students and reporters who are interested in semiconductor technology. During the event, leading engineers in the field of Compute Express Link (CXL) discovered the significance of CXL, delved into the distinctions of CXL 3.0 compared to its predecessors, and explored how CXL technology can revolutionize datacenter architecture. The engineers also shared cutting-edge technologies and research topics related to CXL. Notable presentations included Miryeong Kwon, Chief Strategy Officer (CSO) of Panmnesia, elucidating Panmnesia’s AI acceleration framework built upon the CXL Type2 device. Hanjin Choi, Assistant Director of Panmnesia, unveiled the company’s solution to accelerate practical supercomputing applications which is based on CXL 3.0/3.1 hardware framework. Lastly, Seonghyeon Jang, Assistant Director of Panmnesia, introduced Panmnesia’s cost-efficient, petabyte-scale memory expansion solution based on CXL-SSD technology. Additionally, Myoungsoo Jung, CEO of Panmnesia, highlighted the recent accomplishments of the company and outlined plans for the new year. Noteworthy among the reported achievements was Panmnesia’s active engagement in collaborations and discussions with over twenty global IT companies. The company is poised to expand its business model and expedite recruitment initiatives, leveraging the strategic positioning of their new offices in both Daejeon and Seoul. This event has garnered attention from reputable Korean publications. For those interested, additional details can be found in the articles (link below). Related Article (Korean, ChosunBiz) Related Article (Korean, Sisajournal-e)

Panmnesia's CXL-Enabled AI Accelerator (CXL Device Type2) on CES2024

A cutting-edge CXL IP startup, Panmnesia, unveiled its revolutionary demo of CXL-Enabled AI accelerator empowering large-scale AI at CES 2024. The accelerator has been recognized by the CES 2024 Innovation Award for its 101x superior performance over the existing AI acceleration system. Panmnesia’s CXL-enabled AI accelerator At CES 2024, Panmnesia showcased its award-winning CXL-Enabled AI Accelerator. The accelerator, which is CXL Type2 Device, features virtually limitless memory capacity, bringing a significant performance boost for large-scale AI-driven services. This innovative feature empowers AI-driven services to handle increasing amount of data, leading to substantial enhancements in the accuracy and quality of the services. Unlike conventional AI accelerators constrained by their limited memory capacity, Panmnesia's accelerator shatters this barrier, enabling AI services to operate at an unprecedented level of sophistication. This holds great potential for the AI industry, where the accuracy and quality of AI-driven services are paramount to success in the competitive landscape. In Panmnesia's booth, the company held a demo of its accelerator offering 101x speedup for large-scale AI service compared to the existing AI acceleration system. To show this unprecedented performance, the demo used AI-powered image search as a real-world example. AI-powered image search, a widely deployed service in tech giants such as Google and Microsoft, allows users to find the data they want using an image instead of text as a query. While this service offers a pleasant search experience to users, it is a challenging workload for service providers. The service requires tens of terabytes of memory to manage the AI-generated vectors for each data. Unlike traditional systems that manage vectors on large but slow SSDs, CXL-enabled AI accelerator-based systems can manage vectors on an ample and fast memory space provided by CXL technology, resulting in superior performance. "We believe that our CXL technology will be a cornerstone for next-generation AI acceleration system.", said Myoungsoo Jung, CEO and founder of Panmnesia. "We remain committed to revolutionizing not only AI acceleration systems but also other general-purpose environments such as data centers, cloud computing, and high-performance computing.", he added. Panmnesia’s CXL 3.0 Framework The accelerator has been exhibited with Panmnesia's CXL 3.0-based full system framework, announced last November at the Supercomputing Conference (SC23). The framework offers a turnkey environment to compose a complete system employing CXL 3.0, including the accelerator, CXL CPU, CXL switch, CXL memory expanders, and associated software. "The CXL 3.0 framework represents our technology leadership", said Myoungsoo Jung. "While multiple semiconductor companies are putting their effort on developing CXL products, Panmnesia is currently the only company that secures technology to compose full CXL 3.0-based system and execute user applications like AI." Global IT Leaders' Interest in Panmnesia's CXL 3.0 Technologies During the exhibition, a number of senior executives and employees from leading global IT companies such as Microsoft, Apple, Intel, ARM, and Cadence visited Panmnesia's booth, expressing keen interest in Panmnesia's CXL 3.0 technologies. Panmnesia also had exclusive meetings with representatives from some of these companies. For those interested in Panmnesia's CXL-Enabled AI Accelerator, the introduction video is available on YouTube (refer to the link below). Introduction Video CES 2024 Innovation Award

DockerSSD - Panmnesia's Docker-centric Near Data Processing Technology

Panmnesia has developed DockerSSD, a technology that allows storage devices to be utilized as independent server that processes data without computer. The DockerSSD employs Docker, a widely used operating system-level virtualization software, to provide a complete environment for executing user-level applications. Such a complete environment empowers the users to easily leverage NDP (Near Data Processing) technology. The evaluation result showed that DockerSSD accelerates the execution by 2x and reduces the power consumption by 2x. NDP technology has been discussed for decades as a solution to accelerate data processing by minimizing data movement. To leverage the advantage of NDP, there were numerous approaches from memory/storage vendors. However, these approaches have not been widely deployed due to their poor usability. This is because the vendors did not want their internal hardware and software disclosed. Instead, they have provided their internal environments through different interfaces, forcing applications to be modified to fit these interfaces. To enhance the usability of NDP technology, Panmnesia has developed DockerSSD, a new way of NDP that employs Docker inside the storage device. Docker is an operating system-level virtualization software that provides all the necessary environments for user applications running on the operating system. By leveraging Docker, DockerSSD can implement an environment used in a host within the storage device. This allows users to run their application in storage, without being bounded by vendor-specific interfaces. Since this work relieves a significant burden on the users while providing high performance and high energy efficiency, Panmnesia expects this work to be widely adopted in growing data centers. The paper will be presented in March at ‘IEEE International Symposium on High Performance Computer Architecture, (HPCA) 2024’ held in Edinburgh, Scotland.

Panmnesia Wins CES 2024 Innovation Award for Its CXL Technology on AI Accelerator

Panmensia, a CXL Intellectual Property (IP) leader, announced that it has been bestowed with the CES 2024 Innovation Award for its pioneering CXL-enabled AI accelerator. This recognition came ahead of CES 2024, the world’s premier technology event, set to unfold in Las Vegas. The CES Innovation Awards program is the pinnacle of recognition at CES, bestowed by the Consumer Technology Association (CTA), the event’s owner and producer. Each year, the program curates products from across the globe, seeking out the very best in technology, design, and innovation. Panmnesia won the award for its CXL-enabled AI Accelerator, which will be exhibited at the upcoming CES 2024 event. Panmnesia’s CXL-enabled AI accelerator, the game changer for computing in the large-scale AI era The award-winning accelerator features virtually limitless memory capacity that brings significant performance boost for large-scale AI-driven services. This innovative feature empowers AI-driven services to handle increasing amount of data, leading to significant enhancements in accuracy and quality of the services. Unlike conventional AI accelerators constrained by their limited memory capacity, Panmnesia’s accelerator shatters this barrier, enabling AI services to operate at an unprecedented level of sophistication. This holds a great potential for the AI industry, where the accuracy and quality of AI-driven services are a paramount of success in the competitive landscape. The backbone of this innovation is Compute eXpress Link (CXL), an interface technology that connects an array of system devices, such as accelerators, memory expanders, processors, and switches. By connecting multiple accelerators and memory expanders through CXL switches, CXL can provide memory capacity to the system that satisfies the demands of AI applications. Panmnesia's AI accelerator design allows the accelerator to fully leverage CXL by incorporating a CXL 3.0 controller into the accelerator chip. Furthermore, Panmnesia maximized application performance by tailoring the accelerator's hardware architecture to the specific application. Notably, they chose AI-powered search, a representative large-scale AI application, as their primary acceleration target. Considering that AI-powered search necessitates frequent vector processing, Panmnesia optimized their acceleration architecture to maximize parallelism for vector processing while designing a low-overhead host interface. By combining CXL technology with specialized hardware, Panmnesia has achieved a 101x speedup over existing solutions that utilize SSDs to accommodate large volumes of data. Additionally, Panmnesia emphasized that the accelerator offers significant operating expenses savings for the system, as their specialized hardware reduces energy consumption for data movement and calculation. "We are excited to share that our technological leadership and innovation have been recognized by experts worldwide," said Myoungsoo Jung, CEO and founder of Panmnesia. "We believe that our CXL technology will be a cornerstone for next-generation AI acceleration system. We remain committed to our endeavor revolutionizing not only for AI acceleration system, but also other general-purpose environments such as data centers, cloud computing, and high-performance computing," he added. More details about Panmnesia's award-winning technology will be revealed at the upcoming CES 2024 event in Las Vegas on January 9-12 next year. CES 2024 Innovation Award Link - Article (TechRadar)

Panmnesia on SC23

At the Supercomputing Conference 2023 (SC23), Panmnesia, a leader in CXL Intellectual Property, unveiled the pioneering CXL 3.0 All-in-One Framework. SC23, a pivotal event in the HPC industry, was hosted at the Colorado Convention Center from November 14-16, drawing key players like Google, AWS, and Microsoft. Panmnesia's exhibit 1 Panmnesia's exhibit 2 Panmnesia's exhibit 3 Panmnesia's exhibit 4 Compute eXpress Link (CXL), a cornerstone of Panmnesia’s expertise, is an interface technology that connects an array of system devices, enabling on-demand memory utilization and cost-efficient memory management for HPC and data center environments. Panmnesia's booth 1 Panmnesia's booth 2 Panmnesia's booth 3 Panmnesia’s CXL 3.0 All-in-One Framework Panmnesia’s latest endeavor, the CXL 3.0 All-in-One Framework, was a highlight at SC23, showcasing their ongoing dedication to CXL technology innovation. Dr. Myoungsoo Jung, the CEO and founder of Panmnesia, expressed his enthusiasm for the framework’s launch. “We’re thrilled to introduce our renewed framework,” he said, highlighting the framework’s enhanced internal architecture and advanced CXL 3.0 IPs. This development aims to provide an efficient and comprehensive environment for customers to develop custom CXL software and hardware solutions. This framework features a full array of both hardware and software components, meticulously designed for robust development processes. The hardware suite boasts state-of-the-art CXL 3.0 devices, including a CXLenabled CPU, a CXL switch, and various CXL endpoints. These devices are intricately constructed using Panmnesia’s proprietary CXL 3.0 IPs and are fully compatible with all CXL protocols, such as CXL.io, CXL.cache, and CXL.mem. Panmnesia underscores the significance of these devices, particularly their ability to leverage unique CXL 3.0 features, including memory sharing capabilities. A pivotal component of the framework is the CXL switch, tasked with the crucial function of connecting devices according to user specifications. To enable configurable connectivity, Panmnesia has meticulously designed their CXL switch to incorporate a sophisticated software known as the fabric manager. This software is adept at managing internal routing rules within the switches. Moreover, the switch’s design is not limited to interconnecting devices within the framework; it can also extend its connectivity to include external devices or even another switch. This versatile feature allows users to effortlessly scale their framework, facilitating the construction of systems that closely resemble actual production environments. Panmnesia’s CXL 3.0 All-in-One Framework not only provides advanced hardware but also delivers a comprehensive software stack crucial for executing user-level applications with CXL enhancements. This includes a specialized OS based on Linux, complete with CXL device drivers and a CXL-aware virtual memory subsystem, enabling applications in AI and computational science to fully utilize CXL without requiring code changes. The framework garnered significant attention at SC23, appealing to those looking to incorporate CXL into their solutions. It received positive feedback for its holistic approach, offering both hardware and software capabilities. Software developers were particularly impressed with its readiness for user-level applications, while hardware developers valued its support for interoperability testing, a key aspect in CXL hardware development and testing. This dual appeal underscores Panmnesia’s success in providing a comprehensive, ready-to-use solution for CXL technology integration. Panmnesia's CXL3.0 All-in-One Framework Memory sharing demonstration CXL 3.0 memory sharing demonstration At the booth, Panmnesia showcased a demonstration of memory sharing using CXL 3.0. This was conducted using their CXL 3.0 All-in-One Framework. The demonstration focused on a plasma simulation, an HPC application, to illustrate the benefits of CXL memory sharing. This simulation involves modeling the movement of charged particles by calculating the forces between them. For efficiency, the simulation is typically parallelized by dividing the space into smaller sections and assigning these to different hosts. In order to accurately compute the forces on a particle, the host responsible for that particle must gather information like charge and velocity from neighboring particles. These neighboring particles might be located on different hosts, necessitating data exchange among hosts. Traditional methods for this exchange rely on network communication, which can be slow due to network latency, a known issue in HPC scientific applications. During SC23, Panmnesia introduced a solution based on CXL 3.0 that reduces the overhead of inter-host data exchange. This solution utilizes the memory sharing feature of CXL 3.0 to facilitate data exchange. It enables multiple hosts to access data stored in CXL-attached memory. Panmnesia’s approach, which automates key memory sharing functions, enhances performance significantly. They also shared details of their software implementation, which is built on a popular data exchange library. Panmnesia highlighted the superiority of their CXL 3.0-based solution over traditional network-based methods by demonstrating a notable 1.8x speed increase. They pointed out that the utility of their solution extends beyond plasma simulation, encompassing a broad spectrum of applications such as molecular dynamics, bioinformatics, and computational fluid dynamics, making it broadly applicable in various scientific domains within HPC environments. Plasma simulation demonstration 1 Plasma simulation demonstration 2 Panmnesia’s introduction of this framework marks a pivotal moment for the CXL ecosystem, facilitating accelerated development for both software and hardware enterprises. Furthermore, Panmnesia has solidified its position as a leader in CXL technology with this industry-first public demonstration of CXL 3.0 memory sharing in a complete system, inclusive of a CXL switch. For those interested in exploring Panmnesia’s All-in-One framework and related demonstrations further, videos are available on Youtube (refer to the link below). Demo Video (Youtube)

Panmnesia Will Participate in SC23 Exhibition

Panmnesia is excited to announce the participation in Supercomputer (SC) 2023, which will take place in Denver, Colorado, US from November 12th to November 17th. During this event, Panmnesia will unveil the groundbreaking CXL 3.0 all-in-one framework to the global audience. Panmnesia’s CXL framework solution, featuring the latest CXL 3.0 technologies, enables an infinite memory pool shared by multiple hosts through Port-based Routing(PBR) functionality. With our innovative solution, users can experience efficient data sharing across infinite memories. Panmnesia’s CXL all-in-one framework provides both CXL 3.0 hardware stack (CXL CPUs, switches, and DIMM pools) and its corresponding Linux-based CXL 3.0 software stack. Users can seamlessly apply their applications without modification and benefit from the advanced CXL 3.0 features within Panmnesia’s all-in-one framework. Therefore, for companies who are interested in CXL technology, this framework would be a best option to develop their own CXL hardware/software solutions. Panmnesia will also showcase demonstration accelerating practical HPC applications via memory sharing feature of CXL 3.0. Join us to explore our framework and demo at booth 2253. You can find more detailed information about SC 23 exhibition at the link below. Link - SC23